Designcon 2014 paper pdf

At designcon 2012, rambus engineers and scientists will present 10 technical papers on topics such as signal integrity, highspeed memory design and semiconductor security. This paper describes a methodology flow that enables characterization of a systemlevel power delivery network. Conference paper pdf available january 2015 with 1,579 reads. Designcon 2017 replacing highspeed bottlenecks with pcb superhighways michael griesi, padt michael. As discussed in the previous paper, keys to achieving a useful level of deembedding include careful design, construction, and measurement of the calibration test fixture. Designcon 2014 computation of time domain impedance profile from sparameters.

A brief tour of fec for serial link systems, tutorial presented at designcon 2015. We will discuss its details in the second half of this paper. A paper at designcon 2014 explained the problem, offered a new kind of solution, and a handson tutorial gave engineers a chance to use simulation and measurement software tools that solved the problem. Tips and advanced techniques for characterizing a 28 gbs. Pam4 signaling has been proposed and discussed at various standard bodies for several years. This paper demonstrates the acquisition of advanced circuit board performance parameters from breakaway test coupons measured right at the pcb fabricator. Through a series of tutorials and paper presentations, xilinx experts will share their. He was a technical program chair 20102011 and a symposium chair 201220 for. It is shown that reducing the skew can improve a channels. We show that only the second view allows accurate ber evaluation, even if the eye is closed. It is shown that reducing the skew can improve a channels insertionlosstocrosstalkratio icr. Designcon 2014 demystifying the 28 gbs pcb channel. By obtaining the dielectric and roughness parameters, solely from manufacturers data sheets, phase delay and effective permittivity can now be easily predicted. Obviously, many static simulations do not add up to a dynamic simulation.

Miller, teledyne lecroy chuck ferry, mentor graphics originally presented at designcon 2014 reprinted with permission from ub media. Keysight technologies designcon 2014 mechanism of jitter. Met with enthusiastic industry reception, designcon 2014 was attended by more than 5,000 members of the chip, package, board and systems design communities. Designcon 2014 distributed modeling and characterization. The question comes from the paper in designcon 2014, distributed modeling and characterization of onchipsystem level pdn and jitter impact, by dmitry klokotov from xilinx. From designcon 2014 the presentation that had the biggest impact on. This paper is intended to help system designers navigate through these design challenges by providing a howto guide for defining, executing, and analyzing systemlevel simulations including pcie 5. Manuscript 1m, pdf file designcon 2014, santa clara, ca, january 28 31, 2014 sources and compensation of skew in singleended and differential interconnects. Personal reflections on the past twenty years 2018.

Designcon has been a tremendous source of information for myself and for the. Pdf designcon 2015 ibisami modeling and simulation of. Xlnx experts will highlight highperformance fpga design techniques including 28gbps backplane transceiver design, 3d stacked silicon package design, and comprehensive ddr4 signalintegrity analysis using highperformance ultrascale fpga silicon and packaging at designcon 2014. Cagr for automotive electric systems between 20172022. This paper presents several new findings in characterizing connector, via and pcb. Practical method for measuring digital driver impedance, designcon 2014. Amolak badesha is program director at avago technologies, driving strategic. Xilinx experts to highlight highperformance 7 series and ultrascale fpga designs at designcon 2014. With limited or even no experience with high speed link systems using pam4, system engineers need to rely on endtoend system level simulations. In this paper, we concentrate on analyzing the direct translation performance, as in sutskever et al. Please select a conference event below for the presentations.

Shlepnev, sink or swim at 28 gbps, the pcb design magazine, october 2014, p. In this paper, a practical method to model effective permittivity and phase delay, due to conductor surface roughness, is presented. Using ddr4 as an example this paper shows how touchstone v1. Pdf designcon 2014 computation of time domain impedance. We will show the process of creating a doe, fitting the. Sisoft elearningclick on these links to download pdf copies of papers and. Ubm tech, the daily source of essential business and technical information for decision makers in the electronics industry, held its annual designcon conference and expo last week in santa clara, ca. Designcon 2014 jitter noise duality we compare two approaches where the structure of the eye diagram is considered either as a timing uncertainty or alternatively a vertical uncertainty. Designcon 2015 optimizing symmetry in open field designs julian ferry, samtec, inc. A board with a highdensity bga connector and two 6 traces was carefully laid.

Designcon 2014 comprehensive fullchip methodology to verify em and dynamic voltage drop on high performance fpga designs in the 20nm technology sujeeth udipi, xilinx inc. Keysight technologies designcon 2014 mechanism of jitter amplification in clock channels fangyi rao, keysight technologies, inc. Best paper award at cadence design live, september 2015, boston ma. In the authors designcon 2014 paper 4 we demonstrated performance improvements up to 400% by improving discontinuities in less than 1% of a channels interconnect, or more specifically two of the vias in the channel. Through a series of tutorials and paper presentations. Xilinx experts to highlight highperformance 7 series and. Company brings its unmatched highperformance, highspeed connector options and technical expertise to designcon 2014 designcon 2014 january 28.

At designcon 2014, rambus engineers and scientists will present two papers on the latest research in ultrahigh speed interface design and deliver training on the latest lowpower, highperformance memory solutions. As a firsttimer to designcon, i was literally overwhelmed with all the events, paper presentations and vendors related to signal integrity. Proper modeling techniques for both the active serdes, ami, transistorlevel, etc and passive 3d extraction, sparameters, parasitics, etc devices are described, along with. Talebzadeh was the recipient of 2015 technical paper award of ashrae. Rambus to present 10 papers at designcon 2012 rambus. Ubm techs designcon 2014 post conference report 201402. Challenges and methods conference paper pdf available february 2014 with 14 reads how we measure reads. In practice, one way to improve a vias impedance is. International solidstate circuits conference 2014, and many others. In 2014, he joined the intec design laboratory part of the department of information technology at ghent university. Designcon 2014, santa clara, ca, january 28 31, 2014. In this paper, we are proposing a fundamentally different modeling concept such that the.

His research focuses on highspeed, highfrequency optoelectronic circuits and systems and he is a member of the ecoc technical program committee. This paper details new simulation techniques for serial link signal integrity analysis at data rates above 6 gbps. Simple visual assessment of simulation to measurement correlation may be acceptable, but depends on experience of. How to make predictable pcb interconnects for data rates of 50 gbps and beyond, designcon 2014. Much of the topics were pretty esoteric and i guess you have to design at this level when attempting to get 10 to 12 gbps and higher data. This paper will demonstrate the application of doe and rsm to a cei 28g vsr design. The paper also discusses techniques to reduce radiated emissions. A commonmode current and a nearfield probe measurement technique were introduced in 2. He received the best paper award at designcon 2014 and edaps.

This paper describes a method of using 3d field solver tools to analyze radiated energy across a range of frequencies. In both models, we use an rnn with the gated hidden unit cho et al. On the other hand, the ibisami standard provides interoperability, serdes ip protection, excellent accuracy, and high throughput for link simulations. Quantitative emi analysis of electrical connectors using. Designcon 2016 100 gbs serial transmission over copper using duobinary signaling. Designcon 2014 quantitative emi analysis of electrical. The jitternoise duality and anatomy of an eye diagram. Engineering measurements at fabrication for channel design and process control dr. Edn designcon paper and tutorial explain deembedding.

In our previous designcon 2019 paper, we have demonstrated by using principal component analysis pca, we can turn the complex task of serdes tuning from a complex high dimensional problem 3040 dimension variables to smaller dimensional vectors 34. Designcon 2017 active power noise modeling toward design for emi compliance of ic chips. Molex experts showcase products that meet the next wave of. Simulations ibisami model of driver and receiver measurement channel models custombuilt matlabbased simulator 17. Keysight technologies designcon 2014 modeling, extraction.